A semiconductor package includes: a lower substrate including a lower wiring layer; an upper substrate disposed on the lower substrate and including an upper wiring layer and a cavity; an adhesive layer disposed in the cavity; a semiconductor chip having a first surface and a second surface opposite to the first surface, wherein connection pads are disposed on the first surface of the semiconductor chip and are electrically connected to the lower wiring layer, and wherein the second surface of the semiconductor chip is attached to the adhesive layer; a connection structure disposed between the lower substrate and the upper substrate and electrically connecting the lower wiring layer and the upper wiring layer; an encapsulant at least partially surrounding at least a portion of each of the semiconductor chip and the connection structure; and connection bumps electrically connected to the lower wiring layer.