A semiconductor device includes a first active fin array with first active fins, a second active fin array with second active fins, and a first inactive fin array with first inactive fins between the first active fin array and the second active fin array. The first inactive fins are characterized by a reduced electrical conductivity compared to an electrical conductivity of the first active fins and the second active fins. An active gate region surrounds the first active fin array, the second active fin array, and the first inactive fin array. A first source pad conductor coupled to the first active fins and a second source pad conductor coupled to the second active fins. The first active fin array is configured as an active vertical FET and the second active fin array is configured as a sense FET.