beta
/Level Shifting Circuit Operating Method
Abstract

A method of operating a level shifting circuit includes receiving, at a bias circuit, a first voltage level and a second voltage level, generating, from the bias circuit, a bias voltage having the greater of the first voltage level or the second voltage level, receiving the first voltage level at a source/drain (S/D) terminal of a first PMOS transistor included in a level shifter, receiving the second voltage level at a S/D terminal of a second PMOS transistor included in the level shifter, and receiving the bias voltage at a bulk terminal of each of the first PMOS transistor and the second PMOS transistor.

Full Text

What is claimed is:

A method of operating a level shifting circuit includes receiving, at a bias circuit, a first voltage level and a second voltage level, generating, from the bias circuit, a bias voltage having the greater of the first voltage level or the second voltage level, receiving the first voltage level at a source/drain (S/D) terminal of a first PMOS transistor included in a level shifter, receiving the second voltage level at a S/D terminal of a second PMOS transistor included in the level shifter, and receiving the bias voltage at a bulk terminal of each of the first PMOS transistor and the second PMOS transistor.
Timeline
Filed
02/19/2026
Published
06/25/2026
Granted
Not Available
IPC Codes(4)
H03K 19/0185:using field-effect transistors only
G06F 30/392:Floor-planning or layout, e.g. partitioning or placement
H03K 3/356:Bistable circuits