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/Memory Failure Analysis Based On Bitline Threshold Voltage Distributions
Abstract

Described are systems and methods for memory failure analysis based on bitline threshold voltage distributions. An example method of implementing a failure type prediction model includes: receiving, by a processing device, a first failure-related dataset reflecting a first bitline threshold voltage distribution associated with a first memory device; determining, based on the first failure-related dataset, a first failure type distribution for the first memory device; creating a training dataset comprising the first failure-related dataset and the first failure type distribution; and training, using the training dataset, a failure type prediction model to determine, for a second memory device, a second failure type distribution based on a second failure-related dataset comprising second bitline threshold voltage data associated with a second memory device.

Full Text

What is claimed is:

Described are systems and methods for memory failure analysis based on bitline threshold voltage distributions. An example method of implementing a failure type prediction model includes: receiving, by a processing device, a first failure-related dataset reflecting a first bitline threshold voltage distribution associated with a first memory device; determining, based on the first failure-related dataset, a first failure type distribution for the first memory device; creating a training dataset comprising the first failure-related dataset and the first failure type distribution; and training, using the training dataset, a failure type prediction model to determine, for a second memory device, a second failure type distribution based on a second failure-related dataset comprising second bitline threshold voltage data associated with a second memory device.
Timeline
Filed
02/20/2026
Published
06/25/2026
Granted
Not Available
IPC Codes(1)
G11C 29/12:Built-in arrangements for testing, e.g. built-in self testing [BIST]