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/Semiconductor Device And Manufacturing Method Of The Semiconductor Device
Abstract

There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of conductive patterns and a plurality of interlayer insulating layers, which are alternately stacked on a substrate; a plurality of channel structures extending in a first direction substantially perpendicular to the substrate to penetrate the stack structure; at least one first slit extending in a second direction substantially horizontal to the substrate while penetrating conductive patterns for select lines among the plurality of conductive patterns; a second slit extending in the second direction while penetrating the conductive patterns for select lines; and a plurality of support structures disposed on a bottom of the second slit, the plurality of support structures penetrating conductive patterns for word lines among the plurality of conductive patterns.

Full Text

What is claimed is:

There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of conductive patterns and a plurality of interlayer insulating layers, which are alternately stacked on a substrate; a plurality of channel structures extending in a first direction substantially perpendicular to the substrate to penetrate the stack structure; at least one first slit extending in a second direction substantially horizontal to the substrate while penetrating conductive patterns for select lines among the plurality of conductive patterns; a second slit extending in the second direction while penetrating the conductive patterns for select lines; and a plurality of support structures disposed on a bottom of the second slit, the plurality of support structures penetrating conductive patterns for word lines among the plurality of conductive patterns.
Timeline
Filed
02/20/2026
Published
06/25/2026
Granted
Not Available
IPC Codes(3)
H10B 43/27:the channels comprising vertical portions, e.g. U-shaped channels
H10B 43/10:characterised by the top-view layout
H10B 43/40:characterised by the peripheral circuit region