Systems, methods, and circuitries are provided for controlling access the secondary hardware devices in a controller based on a two part transaction identifier. In one example, a controller includes a primary hardware device, one or more secondary hardware devices, and an interconnect. The interconnect couples the one or more primary hardware devices to the one or more secondary hardware devices. The interconnect is configured to assign a transaction identifier to each access request generated by the primary hardware device based on a mask associated with the primary hardware device. The mask includes m bits and prevents transaction identifiers not associated with the primary hardware device from being assigned to an access request generated by the primary hardware device. Each transaction identifier includes an m bit main component mapped to an application in execution by the primary hardware device and an n bit sub-component mapped to a sub-task of the app