Abstract
A semiconductor device includes a device; a bonding oxide; and a carrier wafer bonded to the device through the bonding oxide. The carrier wafer includes a device area overlapped by the device in a plan view. The carrier wafer further includes an edge area adjacent to an outermost periphery of the carrier wafer, wherein the edge area has a first thickness. The carrier wafer further includes a non-bonding area between the device area and the edge area, wherein the non-bonding area has a second thickness greater than the first thickness, a first width of the non-bonding area is greater than a second width of the edge area, and the non-bonding area is free of an overhang structure.
Full Text
What is claimed is:
A semiconductor device includes a device; a bonding oxide; and a carrier wafer bonded to the device through the bonding oxide. The carrier wafer includes a device area overlapped by the device in a plan view. The carrier wafer further includes an edge area adjacent to an outermost periphery of the carrier wafer, wherein the edge area has a first thickness. The carrier wafer further includes a non-bonding area between the device area and the edge area, wherein the non-bonding area has a second thickness greater than the first thickness, a first width of the non-bonding area is greater than a second width of the edge area, and the non-bonding area is free of an overhang structure.
Timeline
Filed
02/26/2026Published
07/02/2026Granted
Not AvailableIPC Codes(5)
H10P 50/24:of semiconductor materials
H10W 70/60:Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W 70/40)
H10W 72/00:Interconnections or connectors in packages