A semiconductor device may include a plurality of gate electrode layers stacked in a first direction perpendicular to an upper surface of a substrate, a plurality of channel structures penetrating through the plurality of gate electrode layers and extending in the first direction, a plurality of first isolation structures extending in a second direction parallel to the upper surface of the substrate and dividing the plurality of gate electrode layers into a plurality of blocks, and a plurality of second isolation structures extending in the second direction within each of the plurality of blocks. Each of the plurality of first isolation structures may include only a first vertical insulating layer, and at least one of the plurality of second isolation structures may include a second vertical insulating layer and a conductive layer.