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/Memory Device And Method Having Improved Read Operation
Abstract

In certain aspects, a memory device includes an array of memory cells, word lines respectively coupled to rows of the memory cells, and a peripheral circuit coupled to the array of memory cells through the word lines. The peripheral circuit is configured to apply a read voltage to a select word line of the word lines, and discharge the select word line from a voltage greater than the read voltage to a first recovery voltage that is greater than a supply voltage.

Full Text

What is claimed is:

In certain aspects, a memory device includes an array of memory cells, word lines respectively coupled to rows of the memory cells, and a peripheral circuit coupled to the array of memory cells through the word lines. The peripheral circuit is configured to apply a read voltage to a select word line of the word lines, and discharge the select word line from a voltage greater than the read voltage to a first recovery voltage that is greater than a supply voltage.
Timeline
Filed
03/12/2026
Published
07/16/2026
Granted
Not Available
IPC Codes(1)
G06F 3/06:Digital input from, or digital output to, record carriers