Abstract
Apparatuses and methods for performing read operations using an offset based upon slow charge loss characteristics are provided. One example apparatus can include a controller configured to apply a read voltage to a word line in the array of memory cells during a read operation on the word line, wherein the read voltage includes an offset associated with a slow charge loss characteristic of the word line.
Full Text
What is claimed is:
Apparatuses and methods for performing read operations using an offset based upon slow charge loss characteristics are provided. One example apparatus can include a controller configured to apply a read voltage to a word line in the array of memory cells during a read operation on the word line, wherein the read voltage includes an offset associated with a slow charge loss characteristic of the word line.
Timeline
Filed
03/12/2026Published
07/16/2026Granted
Not AvailableIPC Codes(3)
G11C 16/34:Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
G11C 16/04:using variable threshold transistors, e.g. FAMOS
G11C 16/26:Sensing or reading circuits; Data output circuits