A semiconductor device includes: circuits that each includes one or more positive-channel metal-oxide semiconductor field effect transistors (PFETs) or one or more negative-channel metal-oxide semiconductor field effect transistors (NFETs); first and second ones of the circuits representing first and second input circuits configured to operate in a first voltage domain, the one or more PFETs correspondingly thereof being in a first-voltage-domain N-well (FNW), the FNW being substantially centered in a central region of the semiconductor device; and third and fourth ones of circuits representing first and second single bit level shifters (SBLSs) configured to operate in a second voltage domain and electrically coupled correspondingly to the first and second input circuits, the one or more PFETs correspondingly thereof being in corresponding first and second second-voltage-domain N-wells (SNWs); and wherein the first and second SNWs are asymmetrically disposed with respect to a first reference axis substantially bisecting the central region.