Translating between CXL.cache messages may enable large-scale AI clusters to interconnect heterogeneous accelerators via scale-up fabrics and disaggregated memory pools. Such translations may include receiving a CXL.cache Host-to-Device (H2D) request from a first entity, translating the H2D request to a CXL.cache Device-to-Host (D2H) request, and sending the D2H request to a second entity. The translation may encompass opcodes, addresses, and transaction identifiers. One system comprises first and second CXL interfaces and a computer that receives an H2D request via the first interface, translates the request to a D2H request, and sends the D2H request via the second interface. The translation may include address translation between Host Physical Address (HPA) spaces utilized by different entities. The translation capabilities may enable communication between entities that cannot communicate directly due to protocol direction constraints, supporting applications such as disaggregated memory systems, multi-GPU clusters, and heterogeneous computing platforms.