/Semiconductor Device
Abstract

A method for manufacturing a semiconductor device includes forming a first impurity region and a second impurity region on a substrate, forming sacrificial pattern layers on the first and second impurity regions, partially etching the sacrificial pattern layers on the first impurity region and partially etching the first impurity region, forming a bit line structure on the first impurity region, partially etching the sacrificial pattern layers on the second impurity, and forming a storage node contact on a sidewall of the bit line structure and electrically connected to the second impurity region. In the method a portion of the sacrificial pattern layers remains on the second impurity region.

Full Text

What is claimed is:

A method for manufacturing a semiconductor device includes forming a first impurity region and a second impurity region on a substrate, forming sacrificial pattern layers on the first and second impurity regions, partially etching the sacrificial pattern layers on the first impurity region and partially etching the first impurity region, forming a bit line structure on the first impurity region, partially etching the sacrificial pattern layers on the second impurity, and forming a storage node contact on a sidewall of the bit line structure and electrically connected to the second impurity region. In the method a portion of the sacrificial pattern layers remains on the second impurity region.
Timeline
Filed
03/19/2026
Published
07/23/2026
Granted
Not Available
IPC Codes(1)
H10B 12/00:Dynamic random access memory [DRAM] devices