/Methods And Apparatus To Dynamically Correct Time Keeping Errors
Abstract

An example apparatus includes clock divider circuitry configured to divide a system clock by a pre-scaler input to generate a divided clock; counter circuitry configured to increment a system count based on the divided clock; comparison circuitry configured to determine a count difference between the system count and a real-time clock count; and controller circuitry configured to modify the pre-scaler input based on a comparison of the count difference to a threshold value.

Full Text

What is claimed is:

An example apparatus includes clock divider circuitry configured to divide a system clock by a pre-scaler input to generate a divided clock; counter circuitry configured to increment a system count based on the divided clock; comparison circuitry configured to determine a count difference between the system count and a real-time clock count; and controller circuitry configured to modify the pre-scaler input based on a comparison of the count difference to a threshold value.
Timeline
Filed
03/31/2026
Published
08/06/2026
Granted
Not Available
IPC Codes(3)
H03K 21/10:comprising logic circuits
G06F 1/08:Clock generators with changeable or programmable clock frequency
G06F 1/10:Distribution of clock signals