A semiconductor package having a substrate including a first region and a second region at least partially surrounding the first region in a plane defined by a first horizontal direction and a second horizontal direction, where the substrate has a first surface and a second surface opposed to the first surface, a wiring pattern disposed on the first surface of the substrate, a first recess formed on the second surface of the substrate and in the second region of the substrate, a back side insulating layer disposed on the second surface of the substrate, where the back side insulating layer fills an inside of the first recess; and a through via penetrating through the first region of the substrate and the back side insulating layer, where a thickness of the back side insulating layer is greater than a depth of the first recess in a vertical direction.