/Semiconductor Device
Abstract

According to one embodiment, a semiconductor device is provided. The semiconductor device includes a first semiconductor module, a redistribution layer (RDL) module and a second semiconductor module. The RDL module is disposed on the first semiconductor module. The RDL module includes a plurality of polymer layers and a plurality of vias. The polymer layers are stacked on the first semiconductor module. The vias are disposed within the polymer layers. The second semiconductor module is disposed on the RDL module. A height difference of a top surface of at least one of the polymer layers ranges from 0 um to 1 um; or an angle between a sidewall and a bottom surface of at least one of the vias ranges from 90° to 95°; or a glass transition temperature (Tg) of at least one of the polymer layers is larger than 260 ℃.

Full Text

What is claimed is:

According to one embodiment, a semiconductor device is provided. The semiconductor device includes a first semiconductor module, a redistribution layer (RDL) module and a second semiconductor module. The RDL module is disposed on the first semiconductor module. The RDL module includes a plurality of polymer layers and a plurality of vias. The polymer layers are stacked on the first semiconductor module. The vias are disposed within the polymer layers. The second semiconductor module is disposed on the RDL module. A height difference of a top surface of at least one of the polymer layers ranges from 0 um to 1 um; or an angle between a sidewall and a bottom surface of at least one of the vias ranges from 90° to 95°; or a glass transition temperature (Tg) of at least one of the polymer layers is larger than 260 ℃.
Timeline
Filed
04/13/2026
Published
08/13/2026
Granted
Not Available
IPC Codes(6)
H10W 70/60:Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W 70/40)
H10W 20/20:Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
H10W 20/42:Vias, e.g. via plugs