A semiconductor package includes a first lower redistribution layer, a first upper redistribution layer over the first lower redistribution layer, a first semiconductor chip between the first lower redistribution layer and the first upper redistribution layer, a first connection post spaced apart from the first semiconductor chip and connecting the first lower redistribution layer to the first upper redistribution layer, a first interposition layer on the first upper redistribution layer, a second interposition layer on the first interposition layer, a second lower redistribution layer on the second interposition layer, a second upper redistribution layer over the second lower redistribution layer, a second semiconductor chip between the second lower redistribution layer and the second upper redistribution layer, and a second connection post spaced apart from each other and connecting the second lower redistribution layer to the second upper redistribution layer.
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What is claimed is: