/Semiconductor Package Structure
Abstract

A semiconductor package structure includes a first redistribution layer, a first semiconductor die, a first through via with a first width and a second through via with a second width different than the first width, and a second redistribution layer. The first semiconductor die is disposed over the first redistribution layer. The first through via and the second through via are disposed between the first redistribution layer and the first semiconductor die. The bottom end of the first through via is substantially level with the bottom end of the second through via. The second redistribution layer is disposed over a surface of the first semiconductor die that is opposite to the first redistribution layer.

Full Text

What is claimed is:

A semiconductor package structure includes a first redistribution layer, a first semiconductor die, a first through via with a first width and a second through via with a second width different than the first width, and a second redistribution layer. The first semiconductor die is disposed over the first redistribution layer. The first through via and the second through via are disposed between the first redistribution layer and the first semiconductor die. The bottom end of the first through via is substantially level with the bottom end of the second through via. The second redistribution layer is disposed over a surface of the first semiconductor die that is opposite to the first redistribution layer.
Timeline
Filed
04/13/2026
Published
08/13/2026
Granted
Not Available
IPC Codes(5)
H10W 90/00:Package configurations
H10W 20/20:Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
H10W 70/63:Vias, e.g. via plugs