A memory module includes memory input/output pins, a plurality of memory devices, and a power management integrated circuit (PMIC). The PMIC includes an internal output transistor configured to receive an external voltage via at least one of the memory input/output pins and output an internal output voltage to the plurality of memory devices via an output node of the PMIC. The PMIC is configured to output the internal output voltage from the external voltage via the internal output transistor when the external voltage is less than a first threshold voltage, and output the internal output voltage from a clamp voltage via clamp transistors and turn off the internal output transistor when the external voltage exceeds the first threshold voltage.