A semiconductor device includes a substrate, a first cell including a first power supply line, a first CFET including a first transistor disposed on a second surface of the substrate, and a second transistor disposed above the first transistor, a first conductive wall extending in a first direction, and a first interconnect extending in the second direction and connected to the first transistor, and a second cell including a second power supply line extending in the first direction on a first surface, a second CFET including a third transistor disposed on the second surface, and a fourth transistor disposed above the third transistor, a second conductive wall extending in the first direction, and a second interconnect extending in the second direction and connected to the third transistor, wherein the first interconnect and the second interconnect are arranged in a staggered manner in the first direction.
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What is claimed is: