/Clock Modulation Schemes In Integrated Circuits
Abstract

An integrated circuit (IC) includes a clock modulation circuitry including a delay hierarchy circuitry coupled to the register, the delay hierarchy circuitry configured to receive a clock (CLK) signal, provide a delayed master clock (CLKM) signal to a master latch of the register, and provide a delayed slave clock (CLKS) signal to a slave latch of the register.

Full Text

What is claimed is:

An integrated circuit (IC) includes a clock modulation circuitry including a delay hierarchy circuitry coupled to the register, the delay hierarchy circuitry configured to receive a clock (CLK) signal, provide a delayed master clock (CLKM) signal to a master latch of the register, and provide a delayed slave clock (CLKS) signal to a slave latch of the register.
Timeline
Filed
04/14/2026
Published
08/20/2026
Granted
Not Available
IPC Codes(2)
H03K 5/13:Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
H03K 3/037:Bistable circuits