/Mitigating Row Hammer Attacks Through Memory Address Encryption
Abstract

In an embodiment, a system employs encryption on memory addresses generated by a source circuit that generates memory transactions (e.g., a processor such as a central processing unit (CPU), a graphics processing unit (GPU), various embedded processors or microcontrollers; or a peripheral device. The encrypted memory address corresponds to the row that is activated for the memory transaction, instead of the memory address generated by the source circuit.

Full Text

What is claimed is:

In an embodiment, a system employs encryption on memory addresses generated by a source circuit that generates memory transactions (e.g., a processor such as a central processing unit (CPU), a graphics processing unit (GPU), various embedded processors or microcontrollers; or a peripheral device. The encrypted memory address corresponds to the row that is activated for the memory transaction, instead of the memory address generated by the source circuit.
Timeline
Filed
04/21/2026
Published
08/27/2026
Granted
Not Available
IPC Codes(1)
G06F 12/14:Protection against unauthorised use of memory