Abstract
The present disclosure relates to semiconductor structures and, more particularly, to silicon controlled rectifiers with field plate structures and methods of manufacture. The structure includes: a plurality of wells of a first type in a semiconductor substrate; a well of a second type in the semiconductor substrate, the well of the second type surrounding the plurality of wells of the first type; an isolation structure surrounding the plurality of wells of the first type, the isolation structure isolating the well of the second type from the plurality of wells of the first type; and a plurality of field plates on the isolation structure, the plurality of field plates surround the plurality of wells of the first type.
Full Text
What is claimed is:
The present disclosure relates to semiconductor structures and, more particularly, to silicon controlled rectifiers with field plate structures and methods of manufacture. The structure includes: a plurality of wells of a first type in a semiconductor substrate; a well of a second type in the semiconductor substrate, the well of the second type surrounding the plurality of wells of the first type; an isolation structure surrounding the plurality of wells of the first type, the isolation structure isolating the well of the second type from the plurality of wells of the first type; and a plurality of field plates on the isolation structure, the plurality of field plates surround the plurality of wells of the first type.
Timeline
Filed
05/06/2026Published
09/03/2026Granted
Not AvailableIPC Codes(1)
H10D 89/60:Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]