/Unidirectional Command Bus Phase Drift Compensation By Sending The Command Bus Delay To Memory Controller
Abstract

A system has an unmatched communication architecture for a unidirectional command bus and compensates for drift on the command bus based on data provided on a bidirectional data bus. The memory device has an oscillator to measure drift or an amount of delay for the command bus over a time interval. The memory device can return a value over the data bus to the memory controller based on the delay measured with the oscillator. Based on receiving the value, the memory controller can adjust configuration settings for communication on the command bus.

Full Text

What is claimed is:

A system has an unmatched communication architecture for a unidirectional command bus and compensates for drift on the command bus based on data provided on a bidirectional data bus. The memory device has an oscillator to measure drift or an amount of delay for the command bus over a time interval. The memory device can return a value over the data bus to the memory controller based on the delay measured with the oscillator. Based on receiving the value, the memory controller can adjust configuration settings for communication on the command bus.
Timeline
Filed
04/27/2026
Published
09/03/2026
Granted
Not Available
IPC Codes(1)
G06F 13/16:for access to memory bus (takes precedence G06F 13/28)