/Focus Ring For A Plasma-based Semiconductor Processing Tool
Abstract

A focus ring for a plasma-based semiconductor processing tool is designed to provide and/or ensure etch rate uniformity across a wafer during a plasma etch process. The focus ring may include an angled inner wall that is angled away from a center of the focus ring to direct a plasma toward the wafer. The angle of the angled inner wall may be greater than approximately 130 degrees relative to the top surface of the wafer and/or may be less than approximately 50 degrees relative to an adjacent lower surface of the focus ring to reduce and/or eliminate areas of overlapping plasma on the wafer (which would otherwise cause non-uniform etch rates). Moreover, an inner diameter may be configured to be in a range of approximately 209 millimeters to 214 millimeters to further reduce and/or eliminate areas of overlapping plasma on the wafer. In this way, the focus ring provides and/or increases etch rate uniformity across the wafer, which may reduce structural variations across semiconductor devices being formed on the wafer and/or may increase processing yield.

Full Text

What is claimed is:

A focus ring for a plasma-based semiconductor processing tool is designed to provide and/or ensure etch rate uniformity across a wafer during a plasma etch process. The focus ring may include an angled inner wall that is angled away from a center of the focus ring to direct a plasma toward the wafer. The angle of the angled inner wall may be greater than approximately 130 degrees relative to the top surface of the wafer and/or may be less than approximately 50 degrees relative to an adjacent lower surface of the focus ring to reduce and/or eliminate areas of overlapping plasma on the wafer (which would otherwise cause non-uniform etch rates). Moreover, an inner diameter may be configured to be in a range of approximately 209 millimeters to 214 millimeters to further reduce and/or eliminate areas of overlapping plasma on the wafer. In this way, the focus ring provides and/or increases etch rate uniformity across the wafer, which may reduce structural variations across semiconductor devices being formed on the wafer and/or may increase processing yield.
Timeline
Filed
05/08/2026
Published
09/10/2026
Granted
Not Available
IPC Codes(2)
H01J 37/32:Gas-filled discharge tubes (heating by discharge H05B)
H10P 50/24:of semiconductor materials