Present invention relates to a semiconductor memory device. A semiconductor memory device according to the present invention may comprise: a memory cell array including a plurality of memory cells over a substrate, the plurality of memory cells repeatedly arranged in horizontal direction and a vertical direction, the horizontal direction parallel to a surface of the substrate, the vertical direction perpendicular to the surface of the substrate, a bit line coupled to the memory cells arranged in the vertical direction, and a word line coupled to the memory cells arranged in the horizontal direction, wherein each of the memory cells comprises a capacitor comprising a storage node and a plate node, and the plate nodes of the capacitors are coupled to each other in the vertical direction and are spaced apart from each other in the horizontal direction.