/Reinforcement Structures For Chip-interposer And Interposer-substrate Bonding And Methods Of Making The Same
Abstract

An embodiment semiconductor package includes an interposer, a first semiconductor die electrically coupled to a first side of the interposer, and a first reinforcement structure that is mechanically coupled to the interposer and to the first semiconductor die, such that the first reinforcement structure is a solid structure that is adhered to the interposer and to the first semiconductor die and includes an adhesive strength that is greater than 5 N/mm2 and less than 10 N/mm2. The first reinforcement structure is formed at a corner or at an edge of the first semiconductor die and may have a modulus that is greater than 0.1 GPa and less than 1.0 GPa. The semiconductor package may further include a second semiconductor die electrically coupled to the first side of the interposer and a second reinforcement structure that is mechanically coupled to the interposer and to the second semiconductor die.

Full Text

What is claimed is:

An embodiment semiconductor package includes an interposer, a first semiconductor die electrically coupled to a first side of the interposer, and a first reinforcement structure that is mechanically coupled to the interposer and to the first semiconductor die, such that the first reinforcement structure is a solid structure that is adhered to the interposer and to the first semiconductor die and includes an adhesive strength that is greater than 5 N/mm2 and less than 10 N/mm2. The first reinforcement structure is formed at a corner or at an edge of the first semiconductor die and may have a modulus that is greater than 0.1 GPa and less than 1.0 GPa. The semiconductor package may further include a second semiconductor die electrically coupled to the first side of the interposer and a second reinforcement structure that is mechanically coupled to the interposer and to the second semiconductor die.
Timeline
Filed
05/19/2026
Published
09/17/2026
Granted
Not Available
IPC Codes(5)
H10W 42/00:Arrangements for protection of devices (arrangements for thermal protection H10W 40/00)
H10W 70/60:Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W 70/40)
H10W 90/00:Package configurations