Abstract
A semiconductor device including a first conductive layer; a first dielectric layer on the first conductive layer; a second conductive layer on the first dielectric layer; and a second dielectric layer formed between the first dielectric layer and the second conductive layer. The second dielectric layer includes a first layer including titanium oxide, a second layer including aluminum oxide, and a third layer including niobium oxide, vanadium oxide, or tantalum oxide, which are sequentially stacked on the first dielectric layer.
Full Text
What is claimed is:
A semiconductor device including a first conductive layer; a first dielectric layer on the first conductive layer; a second conductive layer on the first dielectric layer; and a second dielectric layer formed between the first dielectric layer and the second conductive layer. The second dielectric layer includes a first layer including titanium oxide, a second layer including aluminum oxide, and a third layer including niobium oxide, vanadium oxide, or tantalum oxide, which are sequentially stacked on the first dielectric layer.
Timeline
Filed
06/02/2026Published
09/24/2026Granted
Not AvailableIPC Codes(1)
H10B 12/00:Dynamic random access memory [DRAM] devices