A method of manufacturing a semiconductor device includes designing a layout of the semiconductor device based on a circuit design, and manufacturing the semiconductor device based on the designed layout, the designing of the layout including placing a first power rail and a second power rail that extend in a first direction and are spaced apart from each other, placing a power tap cell continuously in a first row, a second row adjacent to the first row, and a third row adjacent to the second row, and placing a power delivery network on the second side of the substrate, the power tap cell including a first power through via that penetrates the substrate and extends from the power delivery network to the first power rail, and a second power through via that penetrates the substrate and extends from the power delivery network to the second power rail.