/Method For Making Radio Frequency Silicon-on-insulator (rfsoi) Structure Including A Superlattice
Abstract

A semiconductor processing method may include forming a superlattice layer on a donor semiconductor wafer, the superlattice including a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include performing ion implantation on the donor semiconductor wafer to create a separation layer below the superlattice layer, forming an oxide layer on a base semiconductor wafer, performing ion beam treatment on the oxide layer, bonding the donor semiconductor wafer to the base semiconductor wafer so that the superlattice layer is adjacent the oxide layer, removing portions of the donor wafer at the separation layer from the donor wafer to define an active semiconductor layer above the superlattice layer, and forming an electronic device(s) in the active layer.

Full Text

What is claimed is:

A semiconductor processing method may include forming a superlattice layer on a donor semiconductor wafer, the superlattice including a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include performing ion implantation on the donor semiconductor wafer to create a separation layer below the superlattice layer, forming an oxide layer on a base semiconductor wafer, performing ion beam treatment on the oxide layer, bonding the donor semiconductor wafer to the base semiconductor wafer so that the superlattice layer is adjacent the oxide layer, removing portions of the donor wafer at the separation layer from the donor wafer to define an active semiconductor layer above the superlattice layer, and forming an electronic device(s) in the active layer.
Timeline
Filed
06/04/2026
Published
09/24/2026
Granted
Not Available
IPC Codes(4)
H10P 90/00:Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
H10D 62/815:of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
H10D 86/00:Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates