/Enhanced Error Correction Code For Error Detection And Correction In Multi-level Cell-based Memory Devices
Abstract

Methods for enhanced error correction code for error detection and correction in multi-level cell-based memory devices are provided. The methods include receiving, at an error correction code (ECC) decoder hardware device, data encoded with ECC information from a multi-level cell-based memory device; calculating an error value and an error location for an error in the data using Reed-Solomon (RS) error correction code (ECC); determining an error type of the error, wherein the error type comprises one of no error, a single symbol error in the data, or multiple symbol errors in the data, and wherein determining the error type is based on a +1/−1 error constraint; and responsive to the error type comprising multiple symbol errors, repeating a read of the data from the multi-level cell-based memory device.

Full Text

What is claimed is:

Methods for enhanced error correction code for error detection and correction in multi-level cell-based memory devices are provided. The methods include receiving, at an error correction code (ECC) decoder hardware device, data encoded with ECC information from a multi-level cell-based memory device; calculating an error value and an error location for an error in the data using Reed-Solomon (RS) error correction code (ECC); determining an error type of the error, wherein the error type comprises one of no error, a single symbol error in the data, or multiple symbol errors in the data, and wherein determining the error type is based on a +1/−1 error constraint; and responsive to the error type comprising multiple symbol errors, repeating a read of the data from the multi-level cell-based memory device.
Timeline
Filed
06/15/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(3)
G11C 29/52:Protection of memory contents; Detection of errors in memory contents
G11C 13/00:Digital stores characterised by the use of storage elements not covered by groups or
G11C 29/02:Detection or location of defective auxiliary circuits, e.g. defective refresh counters