/Transistor Structures With Interleaved Body Contacts And Gate Contacts
Abstract

Structures including a field-effect transistor and methods of forming a structure including a field-effect transistor. The structure comprises a trench isolation region in a substrate, and a body contact region that extends through the trench isolation region to the substrate. The structure further comprises a field-effect transistor including a gate connector, a first gate finger that extends from the gate connector, a second gate finger that extends from the gate connector, and a source/drain region disposed between the first gate finger and the second gate finger. The gate connector is positioned over the trench isolation region. The structure further comprises a gate contact coupled to the gate connector, and a body contact that penetrates through a portion of the gate connector to the body contact region.

Full Text

What is claimed is:

Structures including a field-effect transistor and methods of forming a structure including a field-effect transistor. The structure comprises a trench isolation region in a substrate, and a body contact region that extends through the trench isolation region to the substrate. The structure further comprises a field-effect transistor including a gate connector, a first gate finger that extends from the gate connector, a second gate finger that extends from the gate connector, and a source/drain region disposed between the first gate finger and the second gate finger. The gate connector is positioned over the trench isolation region. The structure further comprises a gate contact coupled to the gate connector, and a body contact that penetrates through a portion of the gate connector to the body contact region.
Timeline
Filed
06/15/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(3)
H10D 62/17:Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
H10D 86/00:Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
H10W 20/00:Interconnections in chips, wafers or substrates