A memory device includes a first memory column, a memory array and a sign decoder. The first memory column is configured to store first sign bits. The memory array is configured to store a first data array and generate bit line signals. The sign decoder is configured to output data signals according to the first sign bits and the bit line signals. The data signals correspond to a second data array, and the first data array is generated by reversing rows of the second data array according to the first sign bits.