/Metal Frame Chip Embedded Packaging Substrate And Manufacturing Method Thereof
Abstract

A manufacturing method for a metal frame chip embedded packaging substrate includes preparing a metal plate, forming a metal frame surrounding a cavity by penetrating the metal plate, and selectively partially etching a first surface of the metal frame to form a first groove on the metal frame, embedding a chip in the cavity so that a patterned side of the chip faces the first surface, and laminating a dielectric layer on a second surface of the metal frame opposite the first surface, the dielectric layer covering a back side of the chip and filling the first groove, forming a blind hole and a window on the dielectric layer, and forming a first wiring layer on the first surface and a second wiring layer on the second surface, the first wiring layer being connected to a terminal of the chip.

Full Text

What is claimed is:

A manufacturing method for a metal frame chip embedded packaging substrate includes preparing a metal plate, forming a metal frame surrounding a cavity by penetrating the metal plate, and selectively partially etching a first surface of the metal frame to form a first groove on the metal frame, embedding a chip in the cavity so that a patterned side of the chip faces the first surface, and laminating a dielectric layer on a second surface of the metal frame opposite the first surface, the dielectric layer covering a back side of the chip and filling the first groove, forming a blind hole and a window on the dielectric layer, and forming a first wiring layer on the first surface and a second wiring layer on the second surface, the first wiring layer being connected to a terminal of the chip.
Timeline
Filed
06/12/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(5)
H10W 70/40:Leadframes
H10W 70/04:of leadframes
H10W 72/00:Interconnections or connectors in packages