/Field Effect Transistor
Abstract

In a field effect transistor, trench lower layers are disposed directly below corresponding trenches. Deep layers of p-type extend along a first direction intersecting the trenches and are arranged at intervals along a second direction orthogonal to the first direction. A drain-side layer of n-type is distributed from a position in contact with a lower surface of a body layer to a position below a lower end of each of the deep layers through intervals between the deep layers. The drain-side layer includes a high concentration layer distributed in at least a part of a depth range in which both the deep layers and the trench lower layers are present, and an intermediate concentration layer distributed in at least a part of a depth range between a lower end of the high concentration layer and a lower end of each of the deep layers.

Full Text

What is claimed is:

In a field effect transistor, trench lower layers are disposed directly below corresponding trenches. Deep layers of p-type extend along a first direction intersecting the trenches and are arranged at intervals along a second direction orthogonal to the first direction. A drain-side layer of n-type is distributed from a position in contact with a lower surface of a body layer to a position below a lower end of each of the deep layers through intervals between the deep layers. The drain-side layer includes a high concentration layer distributed in at least a part of a depth range in which both the deep layers and the trench lower layers are present, and an intermediate concentration layer distributed in at least a part of a depth range between a lower end of the high concentration layer and a lower end of each of the deep layers.
Timeline
Filed
06/16/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(5)
H10D 62/10:Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
H10D 12/01:Manufacture or treatment
H10D 30/66:Vertical DMOS [VDMOS] FETs