/Semiconductor Memory Device And Method Of Manufacturing The Same
Abstract

Provided herein are a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a gate stacked body including a plurality of interlayer insulating layers and a plurality of conductive layers that are alternately stacked, wherein a top-most conductive layer, among the plurality of conductive layers, corresponds to a backgate line and the rest of the plurality of conductive layers correspond to word lines, and a vertical channel structure passing through the gate stacked body. A first part of the vertical channel structure passing through the plurality of interlayer insulating layers and the plurality of conductive layers corresponding to the word lines has a circular structure in a plan view, and a second part of the vertical channel structure passing through the conductive layer corresponding to the backgate line has a pair of semicircular structures that are separated from each other in a plan view.

Full Text

What is claimed is:

Provided herein are a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a gate stacked body including a plurality of interlayer insulating layers and a plurality of conductive layers that are alternately stacked, wherein a top-most conductive layer, among the plurality of conductive layers, corresponds to a backgate line and the rest of the plurality of conductive layers correspond to word lines, and a vertical channel structure passing through the gate stacked body. A first part of the vertical channel structure passing through the plurality of interlayer insulating layers and the plurality of conductive layers corresponding to the word lines has a circular structure in a plan view, and a second part of the vertical channel structure passing through the conductive layer corresponding to the backgate line has a pair of semicircular structures that are separated from each other in a plan view.
Timeline
Filed
06/11/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(9)
H10B 43/27:the channels comprising vertical portions, e.g. U-shaped channels
H10B 41/10:characterised by the top-view layout
H10B 41/27:the channels comprising vertical portions, e.g. U-shaped channels