/Atomic Operations Implemented Using Memory Services Of Data Storage Devices
Abstract

A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.

Full Text

What is claimed is:

A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.
Timeline
Filed
06/16/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(2)
G06F 3/06:Digital input from, or digital output to, record carriers
G06F 12/0815:Cache consistency protocols