/Method For Forming Semiconductor Structure
Abstract

A method for forming a semiconductor structure includes following operations. A nanosheet stack is formed over a substrate. The nanosheet stack extends in a first direction. A sacrificial gate structure is formed over the nanosheet stack and extending in a second direction. A portion of the sacrificial gate structure is replaced with a first dielectric wall. The first dielectric wall extends in the first direction. A remaining portion of the sacrificial gate structure is removed to form a plurality of second trenches extending in the second direction. The nanosheet stack is exposed through the second trenches. Portions of the nanosheet stack are removed to form a plurality of nanosheets coupled to the first dielectric wall and separated from each other. Metal gate structures are formed in the trenches. The metal gate structures are formed at two sides of the first dielectric wall.

Full Text

What is claimed is:

A method for forming a semiconductor structure includes following operations. A nanosheet stack is formed over a substrate. The nanosheet stack extends in a first direction. A sacrificial gate structure is formed over the nanosheet stack and extending in a second direction. A portion of the sacrificial gate structure is replaced with a first dielectric wall. The first dielectric wall extends in the first direction. A remaining portion of the sacrificial gate structure is removed to form a plurality of second trenches extending in the second direction. The nanosheet stack is exposed through the second trenches. Portions of the nanosheet stack are removed to form a plurality of nanosheets coupled to the first dielectric wall and separated from each other. Metal gate structures are formed in the trenches. The metal gate structures are formed at two sides of the first dielectric wall.
Timeline
Filed
06/12/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(8)
H10D 84/83:of only insulated-gate FETs [IGFET]
H10D 30/01:Manufacture or treatment
H10D 30/43:having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels