/Integrated Circuit And Method For Forming The Same
Abstract

An integrated circuit includes a substrate and first and second semiconductor structures over the substrate. The first semiconductor structure has a first semiconductor region between a first source region and a first drain region. The second semiconductor structure has a second semiconductor region between a second source region and a second drain region. A first gate structure is over the first semiconductor region and a second gate structure is over the second semiconductor region. The integrated circuit includes a dielectric-containing structure between the first and second gate structures. A height of the dielectric-containing structure is equal to or greater than the first and second gate structures. The integrated circuit includes a dielectric layer contacting the dielectric-containing structure and at least one of the first or second gate structure. The integrated circuit includes a conductive layer and a dielectric liner along a sidewall of the conductive layer and the dielectric layer.

Full Text

What is claimed is:

An integrated circuit includes a substrate and first and second semiconductor structures over the substrate. The first semiconductor structure has a first semiconductor region between a first source region and a first drain region. The second semiconductor structure has a second semiconductor region between a second source region and a second drain region. A first gate structure is over the first semiconductor region and a second gate structure is over the second semiconductor region. The integrated circuit includes a dielectric-containing structure between the first and second gate structures. A height of the dielectric-containing structure is equal to or greater than the first and second gate structures. The integrated circuit includes a dielectric layer contacting the dielectric-containing structure and at least one of the first or second gate structure. The integrated circuit includes a conductive layer and a dielectric liner along a sidewall of the conductive layer and the dielectric layer.
Timeline
Filed
06/16/2026
Published
10/01/2026
Granted
Not Available
IPC Codes(5)
H10W 20/41:characterised by their conductive parts
H10D 30/01:Manufacture or treatment
H10D 30/67:Thin-film transistors [TFT]